A through-silicon via is a vertical electrical connection passing completely through a silicon die or wafer. A through-silicon via in a die connects a component or pad on the active side of the die to a pad or component on the other side of the die. In one application, two or more dice having integrated circuits may be stacked vertically, where through-silicon vias electrically connect the integrated circuits. This application is referred to as 3D packaging, or chip stacking.
During fabrication of through-silicon vias in a wafer, the depth of the through-silicon vias should be tightly controlled to ensure the reliability of subsequent processes. However, through-silicon vias tend to have a relatively high aspect ratio, which contributes to the difficulty in measuring via depth. For example, a through-silicon via may have a diameter of 6 μm and a depth of 50 μm. Optical measurement technology, such as for example confocal microscopy, has been used to measure through-silicon vias depth, but such measurements are susceptible to noise.
Current technology for measuring the depth of through-silicon vias may not produce sufficiently reliable measurements, and may suffer from slow throughput. A tool for accurately measuring the depth of through-silicon vias with relatively high throughput would be desirable.